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Polymers In Electronic Packaging: Introduction to Wafer-Level Underfill

July 15, 2019 By Jeffrey Gotro 1 Comment

Image from DuPont Electronic Solutions [1].

A previous post described the challenges associated with the future use of capillary underfills. The technical drivers for the next generation of underfills are:

  • Bump pitch going to less than 100 microns
  • Bump diameter is moving to less than 50 microns
  • CTE of the underfill needs to be in the range of 20 ppm/°C
  • Large dies will have thousands of copper pillars to interconnect
  • Low K ILD (inner layer dielectric) in chip requires stress control and a robust pillar joining process.

Note: since the previous post, copper pillars with lead-free solder tips has replaced solder bumps as the preferred method to make chip-to-substrate interconnections.

To address the technical challenges in the list above, pre-applied underfills or wafer-applied underfills are being developed.  There are two types of pre-applied underfills:

  1. Wafer level underfills that are coated onto the wafer and B-stages
  2. Non-conductive film (NCF) that is laminated onto the wafer

The processes for each are shown in Figure 1.

Figure 1. Wafer-level underfills using two methods: B-staged no-flow underfill (BNUF) and non-conductive film (NCF).  Image courtesy of Namics.

The process used for the B-staged no-flow underfill was presented in a previous post.

There are several material suppliers developing non-conductive film underfill such as Namics, Dow Electronic Materials and Henkel Electronic Materials. The wafer level underfill process shown in Figure 1 starts with the lamination of the non-conductive film.  In this case, the underfill film is manufactured in a separate process yielding a very uniform thickness, B-staged, highly-filled underfill film. Subsequent posts will discuss the materials available from several suppliers.  The NCF is laminated onto the top side of the wafer.

The process flow is shown Figure 2.

Figure 2. Non-conductive underfill (NCF) process flow

An additional challenge with the non-conductive film approach is that the film and B-staged properties have to allow:

  • Adequate flow and wetting to allow the NCF to flow over the features on the wafer front side (#1 above)
  • Good adhesion of the NCF to the wafer front side and good mechanical properties to prevent the NCF from being damaged during the dicing process (#4 above)
  • Rapid softening, flow and wetting of the substrate during thermocompression bonding (#5 above)

The thermocompression bonding process is critical to achieve both electrical joining of the thousands of copper pillars and formation of a void-free underfill with a uniform fillet around the periphery of the flip-chip.

The TC bonding process is shown in Figure 3.

Figure 3. Thermocompression bonding process for Wafer-level underfill film (WLUF) or alternately called non-conductive film (NCF)

The interested reader may refer to a previous post on the details of the thermocompression bonding process.  Subsequent posts will discuss the various types of non-conductive films under development.

References

  1. Evolution of bumping image from DuPont Electronic Solutions Copper pillar electroplating tutorial.
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« Panel Process for Fan Out Wafer Level Packaging: Part Four, Build-Up Films for Redistribution Layers (RDL)
Polymers In Electronic Packaging: Non-Conductive Film (NCF) Underfill »

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Polymer Innovation Blog

I’m Dr. Jeff Gotro and welcome to the Polymer Innovation Blog. Over the last 40 years I have been involved in polymer research, along with product and process development. I acquired invaluable experience working for IBM, AlliedSignal, Honeywell, Ablestik Labs (now Henkel) and in multiple consulting projects. In this blog, I (along with some guest contributors) will share our experiences, tips, and “tricks of the trade” to get more out of your innovation efforts and discuss new trends and technical advances in the polymer industry.
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