In the last post we outlined the technical drivers for underfills and showed examples of the first type of non-capillary underfill called No-flow underfill (NUF) and introduced the concept of thermocompression (TC) bonding as the process that yielded the best results in the past. Wafer level underfills are becoming more popular and have two embodiments: Non-conductive ... [Click to Continue...]
Polymer Challenges in Electronic Packaging: Part 3 No Flow Underfills
In the last post we discussed capillary underfills which are the mainstay in flip chip packages. However, future technical drivers pose large technical challenges to capillary underfills. The technical drivers for the next generation of underfills are: Bump pitch going to less than 150 microns Bump diameter is moving to less than 50 microns CTE requirements are moving ... [Click to Continue...]
Polymer Challenges in Electronic Packaging: Underfills Part 2
In the previous post we discussed the challenges of capillary underfills. This post will focus on some of the technical aspects required to formulate an effective underfill. As can be seen in the above figure, traditional capillary underfills are typically provided in syringes (or cartridges) and consist of a formulated mixture of thermoset resins and fillers. The resins ... [Click to Continue...]
Polymer Challenges in Electronic Packaging: Underfills Part 1
Underfills are used to stabilize solder bumps and more recently copper pillar interconnections. The coefficient of thermal expansion (CTE) mismatch between the silicon chip and the polymer-based semiconductor substrate causes fatigue in the interconnections as the package thermally cycles. Capillary underfills have been used for many years. In the case of capillary ... [Click to Continue...]
Polymer Challenges in Electronic Packaging: Overview
This post will outline the next blog series on polymer challenges in electronic packaging. Polymers are key enablers of electronic packaging. For those new to electronics, the term “packaging” is used for the technology utilized to connect a semiconductor chip (or die) to various types of substrates and eventually to a multilayer printed circuit board (PCB). Electronic ... [Click to Continue...]