The last post introduced the use of a polymer dielectric as a redistribution layer (RDL) as a means to fan-out circuit traces from the chip to the backside of the package. In the image on the left, the RDL layers are shown in green (RDL1) and purple (RDL2).  The RDL layers (also called dielectric layers) are applied to the reconstituted wafer and imaged using photolighography. ... [Click to Continue...]

The last post focused on molding compounds used in Fan-Out Wafer Level Packaging (FOWLP) as seen in black in the image above (source Infineon).  A key enabler in the fan-out package is the polymer redistribution layer (RDL) or sometimes referred to as the dielectric layer.  There are several types of polymers used as photosensitive dielectrics in FOWLP: Polyimide (PI) ... [Click to Continue...]

This post will focus on the epoxy molding process using liquid and solid EMC for FOWLP.  In the image on the left, a liquid EMC is shown on the surface of the partially reconstituted wafer prior to compression molding (source: Nanium).  For FOWLP, the compression molding process is different compared with the transfer molding process typically used for EMC’s.  A schematic of ... [Click to Continue...]

In the last post, the processing of epoxy mold compounds (EMC) for standard leadframe packages, such as the Quad Flat Pack No Lead (QFN) shown on the left and PBGA packages was discussed.  Leadframe, PBGA and flip chip packages continue to be high volume products and as such mold compound technology has matured.  In the drive to have thinner electronic packaging, driven mainly ... [Click to Continue...]